Sunvell T95 S1

TX3 Mini, X96 Mini, W95 to name a few...
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bumerc
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#51

[mention]Jerryjr200[/mention]
1. Write u-boot.bin on the SDcard and put it in the box
2. Execute the following commands in the uboot terminal and post the log

Code: Select all

store erase boot

Code: Select all

reset
u-boot@p281
Jerryjr200
Verified Member
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#52

bumerc wrote: Fri Apr 05, 2019 10:29 pm [mention]Jerryjr200[/mention]
1. Write u-boot.bin on the SDcard and put it in the box
2. Execute the following commands in the uboot terminal and post the log

Code: Select all

store erase boot

Code: Select all

reset
u-boot@p281
Thank you bumerc i will wait for your next command ill do my best to follow along

results with sd boot card maker using the last downloaded from you and both uboot files copied to the sd from this last download
not sure what im looking at most of the time but im having fun


Code: Select all

Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
gxl_p212_v1#store erase boot
erasing 0 %-10 % complete
erasing 50 %-60 % complete
NAND ERASE OK

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 165758

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 08 4f 30 0e 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 2048MB(auto)-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121690

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0d 53 2e 0c 51 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 2048MB(auto)-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121687

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0d 53 2d 0b 4f 2f 0c 52 30 30 30 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 2048MB(auto)-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121690

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0d 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 2048MB(auto)-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121694

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0e 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 2048MB(auto)-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
T95S1 S905W, T9 RK3328, T95Z
bumerc
Administrator & Developer
Posts: 1551
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#53

Ok, I reduce RAM storage capacity to 1024MB and you test it again. In the meantime, please unpack your original uboot.bin (bootloader.PARTITION) and repeat the test. So we can see if SDcard boot actually works and we do not run in a Circle :)

But my guess falls on the 2048MB, which apparently can not be used

UPDATE

uboot@p281_1g
Jerryjr200
Verified Member
Posts: 45
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Has thanked: 37 times
Been thanked: 9 times

#54

thank you
Ok 1 log using the 1g uboot and the other log using file found in the img that i used rickys tool to extract and found this file (aml_sdc_burn.UBOOT) and i renamed it to uboot.bin



With 1G uboot

Code: Select all

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 280331

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0d 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121692

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0e 52 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121696

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 2f 2f 2f 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121692

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 2f 2f 2f 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121695

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0

from img i use to recover I stopped putty in order to keep the beginning of the log

Code: Select all

(using aml_sdc_burn.UBOOT renameded you uboot.bin and bootcard maker)


gxl_p212_v1#store erase boot
erasing 0 %-10 % complete
erasing 50 %-60 % complete
NAND ERASE OK

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 122000

BL2 Built : 11:04:41, Jan 26 2018.
gxl g034b32c - xingyu.chen@droid12-sz

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 720MHz

bist_test rank: 0 2e 05 58 35 0b 5f 33 0b 5c 36 0d 5f 35 35 35 36 36 36 35 35 35 35 35 35 661
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00067200
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
[BL31]: GXL CPU setup!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3308-b30529c-dirty 2018-05-28 19:44:39]
OPS=0xc4
21 0d c4 00 fe a3 0e a1 6c de 31 19 a6 8f af 01
[0.539998 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Sep 07 2018 - 16:52:38)

DRAM:  1 GiB
Relocation Offset is: 36eb0000
===============y20180907k=====================
register usb cfg[0][1] = 0000000037f59ae0
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
NAND device id: 2c 84 64 54 a9 0 0 0
detect NAND device: B revision L95B NAND 16GiB MT29F128G08CBECB
param data[32~43]: 53, 50, 45, 43,54, 45
nand Manufacturer: specteck

bus_c=6,bus_t=7,sys=4.0ns,T_REA=16,T_RHOH=15
new oob mode
show_phydev_list
0: nfboot
detect new nand here and new_type:50
NAND CKECK:arg nbbt: valid=1, blk=2, page=0
NAND CKECK:arg fbbt: valid=1, blk=3, page=0
outside dtb: 0000000000000000
using dtb on nand
amlnf_dtb_init_partitions: probe.
NAND CKECK:arg ndtb: valid=1, blk=8, page=17
dtb magic 5f4c4d41
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
start dts,buffer=0000000033ed6300,dt_addr=0000000033ed6b00
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
parts: 10
00:      logo   0000000002000000 1
01:  recovery   0000000002000000 1
02:       rsv   0000000000800000 1
03:       tee   0000000000800000 1
04:     crypt   0000000002000000 1
05:      misc   0000000002000000 1
06:      boot   0000000002000000 1
07:    system   0000000080000000 1
08:     cache   0000000020000000 2
09:      data   ffffffffffffffff 4
cache !!!
NAND CKECK:arg ncnf: valid=1, blk=5, page=0
aml_key_init probe.
NAND CKECK:arg nkey: valid=1, blk=4, page=51
boot_device_flag 1
NAND CKECK:arg nenv: valid=1, blk=7, page=85
NAND CKECK:arg phyp: valid=1, blk=6, page=1
amlnand_phydev_init,1429,phydev->offset=0,phydev->size=1000000
amlnand_phydev_init,1429,phydev->offset=19000000,phydev->size=2a000000
amlnand_phydev_init,1429,phydev->offset=43000000,phydev->size=9e000000
amlnand_phydev_init,1429,phydev->offset=e1000000,phydev->size=31f000000
nfboot    : 0x000000000000-0x000001000000 :partn=0:single_chip single_plane
nfcache   : 0x000019000000-0x00002a000000 :partn=1:single_chip multi_plane
nfcode    : 0x000043000000-0x00009e000000 :partn=8:single_chip multi_plane
nfdata    : 0x0000e1000000-0x00031f000000 :partn=1:single_chip multi_plane
amlnf_logic_init() start
(nfcache), size:2a000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
size_in_blk 42; total_block 41;
get the phy_dev_size=20000000H tmp_off_size=100000H phy_dev_block=21Hnftl start:size_in_blk=41,free_block_num=8-blks(41), total_blocks(33)
(nfcode), size:9e000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
get the phy_dev_size=8b000000H tmp_off_size=458000H phy_dev_block=8cHnftl start:size_in_blk=158,free_block_num=18-blks(158), total_blocks(140)
amlnf_logic_init() done
MMC:   aml_priv->desc_buf = 0x0000000033f04370
aml_priv->desc_buf = 0x0000000033f06690
SDIO Port B: 0, SDIO Port C: 1
uboot env amlnf_env_read : ####
In:    serial
Out:   serial
Err:   serial
reboot_mode=watchdog_reboot
[store]To run cmd[amlnf dtb_read 0x1000000 0x40000]
cmd dtb_read:
amlnf_dtb_read: ####
262144 bytes dtd_read : OK
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
vpu: clk_level in dts: 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpu: vpu_clk_gate_init_off
vpp: vpp_init
hpd_state=0
cvbs performance type = 7, table = 0
card in
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 3
OEM: 5054
Name: SL16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
mmc clock: 40000000
Bus Width: 4-bit
Net:   dwmac.c9410000amlkey_init() enter!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0

Start read misc partition datas!
info->attemp_times = 0
info->active_slot = 0
info->slot_info[0].bootable = 1
info->slot_info[0].online = 1
info->slot_info[1].bootable = 0
info->slot_info[1].online = 0
info->attemp_times = 0
attemp_times = 0
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x3d851000
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x3d851000
[CANVAS]addr=0x3d851000 width=3840, height=2160
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0
[KM]Error:f[key_manage_query_size]L507:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L507:key[deviceid] not programed yet
detect sadckey ....
saradc - saradc sub-system

Usage:
saradc saradc open <channel>    - open a SARADC channel
saradc close    - close the SARADC
saradc getval   - get the value in current channel
saradc test     - test the SARADC by channel-7
saradc get_in_range <min> <max> - return 0 if current value in the range of current channel

gpio: pin GPIOAO_2 (gpio 102) value is 1
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
Booting...
Unknown command 'unifykey' - try 'help'
Unknown command 'unifykey' - try 'help'
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =3418fe10
copy done
Kernel command line: buildvariant=user
load dtb from 0x1000000 ......
      Amlogic multi-dtb tool
      Single dtb detected
   Uncompressing Kernel Image ...
T95S1 S905W, T9 RK3328, T95Z
bumerc
Administrator & Developer
Posts: 1551
Joined: Tue Oct 02, 2018 6:19 pm
Answers: 0
Has thanked: 211 times
Been thanked: 334 times

#55

Jerryjr200 wrote: Sun Apr 07, 2019 1:08 am thank you
Ok 1 log using the 1g uboot and the other log using file found in the img that i used rickys tool to extract and found this file (aml_sdc_burn.UBOOT) and i renamed it to uboot.bin



With 1G uboot

Code: Select all

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 280331

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0d 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121692

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2b 07 4f 30 0e 52 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121696

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 2f 2f 2f 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121692

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 2f 2f 2f 30 30 30 2f 2f 2f 2e 2e 2e 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121695

BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 792MHz

bist_test rank: 0 2a 06 4f 30 0e 53 2d 0b 4f 2f 0c 53 30 30 30 30 30 30 30 30 30 2f 2f 2f 664
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00068200
NOTICE:  BL3-1: v1.0(release):7c45a4f
NOTICE:  BL3-1: Built : 14:09:28, Oct 13 2017
[BL31]: GXL CPU setup!
NOTICE:  BL31: GXL normal boot!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0xc4
Wrong chip c0

from img i use to recover I stopped putty in order to keep the beginning of the log

Code: Select all

(using aml_sdc_burn.UBOOT renameded you uboot.bin and bootcard maker)


gxl_p212_v1#store erase boot
erasing 0 %-10 % complete
erasing 50 %-60 % complete
NAND ERASE OK

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 122000

BL2 Built : 11:04:41, Jan 26 2018.
gxl g034b32c - xingyu.chen@droid12-sz

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 720MHz

bist_test rank: 0 2e 05 58 35 0b 5f 33 0b 5c 36 0d 5f 35 35 35 36 36 36 35 35 35 35 35 35 661
Rank0: 1024MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00067200
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
[BL31]: GXL CPU setup!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3308-b30529c-dirty 2018-05-28 19:44:39]
OPS=0xc4
21 0d c4 00 fe a3 0e a1 6c de 31 19 a6 8f af 01
[0.539998 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Sep 07 2018 - 16:52:38)

DRAM:  1 GiB
Relocation Offset is: 36eb0000
===============y20180907k=====================
register usb cfg[0][1] = 0000000037f59ae0
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
NAND device id: 2c 84 64 54 a9 0 0 0
detect NAND device: B revision L95B NAND 16GiB MT29F128G08CBECB
param data[32~43]: 53, 50, 45, 43,54, 45
nand Manufacturer: specteck

bus_c=6,bus_t=7,sys=4.0ns,T_REA=16,T_RHOH=15
new oob mode
show_phydev_list
0: nfboot
detect new nand here and new_type:50
NAND CKECK:arg nbbt: valid=1, blk=2, page=0
NAND CKECK:arg fbbt: valid=1, blk=3, page=0
outside dtb: 0000000000000000
using dtb on nand
amlnf_dtb_init_partitions: probe.
NAND CKECK:arg ndtb: valid=1, blk=8, page=17
dtb magic 5f4c4d41
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
start dts,buffer=0000000033ed6300,dt_addr=0000000033ed6b00
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
parts: 10
00:      logo   0000000002000000 1
01:  recovery   0000000002000000 1
02:       rsv   0000000000800000 1
03:       tee   0000000000800000 1
04:     crypt   0000000002000000 1
05:      misc   0000000002000000 1
06:      boot   0000000002000000 1
07:    system   0000000080000000 1
08:     cache   0000000020000000 2
09:      data   ffffffffffffffff 4
cache !!!
NAND CKECK:arg ncnf: valid=1, blk=5, page=0
aml_key_init probe.
NAND CKECK:arg nkey: valid=1, blk=4, page=51
boot_device_flag 1
NAND CKECK:arg nenv: valid=1, blk=7, page=85
NAND CKECK:arg phyp: valid=1, blk=6, page=1
amlnand_phydev_init,1429,phydev->offset=0,phydev->size=1000000
amlnand_phydev_init,1429,phydev->offset=19000000,phydev->size=2a000000
amlnand_phydev_init,1429,phydev->offset=43000000,phydev->size=9e000000
amlnand_phydev_init,1429,phydev->offset=e1000000,phydev->size=31f000000
nfboot    : 0x000000000000-0x000001000000 :partn=0:single_chip single_plane
nfcache   : 0x000019000000-0x00002a000000 :partn=1:single_chip multi_plane
nfcode    : 0x000043000000-0x00009e000000 :partn=8:single_chip multi_plane
nfdata    : 0x0000e1000000-0x00031f000000 :partn=1:single_chip multi_plane
amlnf_logic_init() start
(nfcache), size:2a000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
size_in_blk 42; total_block 41;
get the phy_dev_size=20000000H tmp_off_size=100000H phy_dev_block=21Hnftl start:size_in_blk=41,free_block_num=8-blks(41), total_blocks(33)
(nfcode), size:9e000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
get the phy_dev_size=8b000000H tmp_off_size=458000H phy_dev_block=8cHnftl start:size_in_blk=158,free_block_num=18-blks(158), total_blocks(140)
amlnf_logic_init() done
MMC:   aml_priv->desc_buf = 0x0000000033f04370
aml_priv->desc_buf = 0x0000000033f06690
SDIO Port B: 0, SDIO Port C: 1
uboot env amlnf_env_read : ####
In:    serial
Out:   serial
Err:   serial
reboot_mode=watchdog_reboot
[store]To run cmd[amlnf dtb_read 0x1000000 0x40000]
cmd dtb_read:
amlnf_dtb_read: ####
262144 bytes dtd_read : OK
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 1g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 0
vpu: clk_level in dts: 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpu: vpu_clk_gate_init_off
vpp: vpp_init
hpd_state=0
cvbs performance type = 7, table = 0
card in
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 3
OEM: 5054
Name: SL16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
mmc clock: 40000000
Bus Width: 4-bit
Net:   dwmac.c9410000amlkey_init() enter!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0

Start read misc partition datas!
info->attemp_times = 0
info->active_slot = 0
info->slot_info[0].bootable = 1
info->slot_info[0].online = 1
info->slot_info[1].bootable = 0
info->slot_info[1].online = 0
info->attemp_times = 0
attemp_times = 0
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x3d851000
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x3d851000
[CANVAS]addr=0x3d851000 width=3840, height=2160
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0
[KM]Error:f[key_manage_query_size]L507:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L507:key[deviceid] not programed yet
detect sadckey ....
saradc - saradc sub-system

Usage:
saradc saradc open <channel>    - open a SARADC channel
saradc close    - close the SARADC
saradc getval   - get the value in current channel
saradc test     - test the SARADC by channel-7
saradc get_in_range <min> <max> - return 0 if current value in the range of current channel

gpio: pin GPIOAO_2 (gpio 102) value is 1
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
Booting...
Unknown command 'unifykey' - try 'help'
Unknown command 'unifykey' - try 'help'
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =3418fe10
copy done
Kernel command line: buildvariant=user
load dtb from 0x1000000 ......
      Amlogic multi-dtb tool
      Single dtb detected
   Uncompressing Kernel Image ...
I sent you some links via PM, test these * .bin files. Please remove the heat sink and check the processor mark. All of these binaries that you have already tested have been tested and work on a normal (real) p281 board.
Jerryjr200
Verified Member
Posts: 45
Joined: Sun Feb 24, 2019 11:31 pm
Answers: 0
Has thanked: 37 times
Been thanked: 9 times

#56

T95S1 S905W, T9 RK3328, T95Z
scropp
Posts: 1
Joined: Sat Apr 06, 2019 8:44 pm
Answers: 0

#57

Hi, I have exactly the same device as this (with a slightly newer date code on the pcb) and have had the same experience as you with trying to change the firmware, so I am following along with your investigations with interest.

It is selling under the name of HaiFen T95 S1 on Amazon in the UK.

If there is anything I can do to assist, please let me know.

Stephen
Jerryjr200
Verified Member
Posts: 45
Joined: Sun Feb 24, 2019 11:31 pm
Answers: 0
Has thanked: 37 times
Been thanked: 9 times

#58

Ok i was able to fined both imgs for the T95S1 the 1/8 found here in this thread and the 2/16 at Freaktab
To be used with USB burning tool
I had the 1G burned to mine since i was unable to find the 2G the 2G burnd to mine just fine takes over 4 minuets
Still want to keep working on this so maybe we will be able to burn custom firmware's at some time bumerc has been working hard on this and i am not the best help i know but maybe this will get some of you going with the original firmware

T95S1_1GB_TS10011.rar
https://drive.google.com/open?id=11aBbX ... VehOQKYU8F

T95S1_2GB_TS10022.rar
https://drive.google.com/open?id=1IX9Sr ... iH6Ej80vEJ
T95S1 S905W, T9 RK3328, T95Z
Jerryjr200
Verified Member
Posts: 45
Joined: Sun Feb 24, 2019 11:31 pm
Answers: 0
Has thanked: 37 times
Been thanked: 9 times

#59

TY bumerc
I have went back thru all the uboots and the new ones you pm me all give the wrong chip c0
Then i used the uboot extracted fro the T95S1 2G img i found


Bootup 2G img installed

Code: Select all

GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 165731

BL2 Built : 11:04:41, Jan 26 2018.
gxl g034b32c - xingyu.chen@droid12-sz

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 720MHz

bist_test rank: 0 2d 06 55 37 0f 5f 33 0c 5a 37 10 5f 35 35 35 36 36 36 35 35 35 35 35 35 655
Rank0: 2048MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00067200
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
[BL31]: GXL CPU setup!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3308-b30529c-dirty 2018-05-28 19:44:39]
OPS=0xc4
21 0d c4 00 fe a3 0e a1 6c de 31 19 a6 8f af 01
[0.592867 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Sep 07 2018 - 16:46:33)

DRAM:  2 GiB
Relocation Offset is: 76eb0000
===============y20180907k=====================
register usb cfg[0][1] = 0000000077f59ae0
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
NAND device id: 2c 84 64 54 a9 0 0 0
detect NAND device: B revision L95B NAND 16GiB MT29F128G08CBECB
param data[32~43]: 53, 50, 45, 43,54, 45
nand Manufacturer: specteck

bus_c=6,bus_t=7,sys=4.0ns,T_REA=16,T_RHOH=15
new oob mode
show_phydev_list
0: nfboot
detect new nand here and new_type:50
NAND CKECK:arg nbbt: valid=1, blk=2, page=0
NAND CKECK:arg fbbt: valid=1, blk=3, page=0
outside dtb: 0000000000000000
using dtb on nand
amlnf_dtb_init_partitions: probe.
NAND CKECK:arg ndtb: valid=1, blk=8, page=17
dtb magic 5f4c4d41
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
start dts,buffer=0000000073ed6300,dt_addr=0000000073ee1300
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
parts: 10
00:      logo   0000000002000000 1
01:  recovery   0000000002000000 1
02:       rsv   0000000000800000 1
03:       tee   0000000000800000 1
04:     crypt   0000000002000000 1
05:      misc   0000000002000000 1
06:      boot   0000000002000000 1
07:    system   0000000080000000 1
08:     cache   0000000020000000 2
09:      data   ffffffffffffffff 4
cache !!!
NAND CKECK:arg ncnf: valid=1, blk=5, page=0
aml_key_init probe.
NAND CKECK:arg nkey: valid=1, blk=4, page=51
boot_device_flag 1
NAND CKECK:arg nenv: valid=1, blk=7, page=65
NAND CKECK:arg phyp: valid=1, blk=6, page=1
amlnand_phydev_init,1429,phydev->offset=0,phydev->size=1000000
amlnand_phydev_init,1429,phydev->offset=19000000,phydev->size=2a000000
amlnand_phydev_init,1429,phydev->offset=43000000,phydev->size=9e000000
amlnand_phydev_init,1429,phydev->offset=e1000000,phydev->size=31f000000
nfboot    : 0x000000000000-0x000001000000 :partn=0:single_chip single_plane
nfcache   : 0x000019000000-0x00002a000000 :partn=1:single_chip multi_plane
nfcode    : 0x000043000000-0x00009e000000 :partn=8:single_chip multi_plane
nfdata    : 0x0000e1000000-0x00031f000000 :partn=1:single_chip multi_plane
amlnf_logic_init() start
(nfcache), size:2a000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
size_in_blk 42; total_block 41;
get the phy_dev_size=20000000H tmp_off_size=100000H phy_dev_block=21Hnftl start:size_in_blk=41,free_block_num=8-blks(41), total_blocks(33)
(nfcode), size:9e000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
get the phy_dev_size=8b000000H tmp_off_size=458000H phy_dev_block=8cHnftl start:size_in_blk=158,free_block_num=18-blks(158), total_blocks(140)
amlnf_logic_init() done
MMC:   aml_priv->desc_buf = 0x0000000073f04370
aml_priv->desc_buf = 0x0000000073f06690
SDIO Port B: 0, SDIO Port C: 1
uboot env amlnf_env_read : ####
In:    serial
Out:   serial
Err:   serial
reboot_mode=cold_boot
[store]To run cmd[amlnf dtb_read 0x1000000 0x40000]
cmd dtb_read:
amlnf_dtb_read: ####
262144 bytes dtd_read : OK
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
vpu: clk_level in dts: 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpu: vpu_clk_gate_init_off
vpp: vpp_init
hpd_state=0
cvbs performance type = 7, table = 0
card in
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 3
OEM: 5054
Name: SL16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
mmc clock: 40000000
Bus Width: 4-bit
Net:   dwmac.c9410000amlkey_init() enter!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0

Start read misc partition datas!
info->attemp_times = 0
info->active_slot = 0
info->slot_info[0].bootable = 1
info->slot_info[0].online = 1
info->slot_info[1].bootable = 0
info->slot_info[1].online = 0
info->attemp_times = 0
attemp_times = 0
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[CANVAS]addr=0x7f851000 width=3840, height=2160
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0
[KM]Error:f[key_manage_query_size]L507:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L507:key[deviceid] not programed yet
detect sadckey ....
saradc - saradc sub-system

Usage:
saradc saradc open <channel>    - open a SARADC channel
saradc close    - close the SARADC
saradc getval   - get the value in current channel
saradc test     - test the SARADC by channel-7
saradc get_in_range <min> <max> - return 0 if current value in the range of current channel

gpio: pin GPIOAO_2 (gpio 102) value is 1
InUsbBurn
noSof
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
gxl_p212_v1#


With UBoot extracted from T95S1 2G img

Code: Select all

With UBoot extracted from T95S1 2G img

gxl_p212_v1#store erase boot
erasing 0 %-10 % complete
erasing 50 %-60 % complete
NAND ERASE OK

gxl_p212_v1#reset
resetting ...
GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:800;NAND:85;SD:0;READ:0;0.0;CHK:0;
no sdio debug board detected
TE: 121966

BL2 Built : 11:04:41, Jan 26 2018.
gxl g034b32c - xingyu.chen@droid12-sz

set vcck to 1120 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0 16bit @ 720MHz

bist_test rank: 0 2e 06 56 36 0e 5e 34 0d 5b 35 0e 5d 35 35 35 36 36 36 34 34 34 34 34 34 661
Rank0: 2048MB-2T-11
AddrBus test pass!
Load fip header from SD, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from SD, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from SD, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from SD, src: 0x00050200, des: 0x01000000, size: 0x00067200
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
[BL31]: GXL CPU setup!
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3308-b30529c-dirty 2018-05-28 19:44:39]
OPS=0xc4
21 0d c4 00 fe a3 0e a1 6c de 31 19 a6 8f af 01
[0.548993 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Sep 07 2018 - 16:46:33)

DRAM:  2 GiB
Relocation Offset is: 76eb0000
===============y20180907k=====================
register usb cfg[0][1] = 0000000077f59ae0
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
NAND device id: 2c 84 64 54 a9 0 0 0
detect NAND device: B revision L95B NAND 16GiB MT29F128G08CBECB
param data[32~43]: 53, 50, 45, 43,54, 45
nand Manufacturer: specteck

bus_c=6,bus_t=7,sys=4.0ns,T_REA=16,T_RHOH=15
new oob mode
show_phydev_list
0: nfboot
detect new nand here and new_type:50
NAND CKECK:arg nbbt: valid=1, blk=2, page=0
NAND CKECK:arg fbbt: valid=1, blk=3, page=0
outside dtb: 0000000000000000
using dtb on nand
amlnf_dtb_init_partitions: probe.
NAND CKECK:arg ndtb: valid=1, blk=8, page=17
dtb magic 5f4c4d41
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
start dts,buffer=0000000073ed6300,dt_addr=0000000073ee1300
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
parts: 10
00:      logo   0000000002000000 1
01:  recovery   0000000002000000 1
02:       rsv   0000000000800000 1
03:       tee   0000000000800000 1
04:     crypt   0000000002000000 1
05:      misc   0000000002000000 1
06:      boot   0000000002000000 1
07:    system   0000000080000000 1
08:     cache   0000000020000000 2
09:      data   ffffffffffffffff 4
cache !!!
NAND CKECK:arg ncnf: valid=1, blk=5, page=0
aml_key_init probe.
NAND CKECK:arg nkey: valid=1, blk=4, page=51
boot_device_flag 1
NAND CKECK:arg nenv: valid=1, blk=7, page=105
NAND CKECK:arg phyp: valid=1, blk=6, page=1
amlnand_phydev_init,1429,phydev->offset=0,phydev->size=1000000
amlnand_phydev_init,1429,phydev->offset=19000000,phydev->size=2a000000
amlnand_phydev_init,1429,phydev->offset=43000000,phydev->size=9e000000
amlnand_phydev_init,1429,phydev->offset=e1000000,phydev->size=31f000000
nfboot    : 0x000000000000-0x000001000000 :partn=0:single_chip single_plane
nfcache   : 0x000019000000-0x00002a000000 :partn=1:single_chip multi_plane
nfcode    : 0x000043000000-0x00009e000000 :partn=8:single_chip multi_plane
nfdata    : 0x0000e1000000-0x00031f000000 :partn=1:single_chip multi_plane
amlnf_logic_init() start
(nfcache), size:2a000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
size_in_blk 42; total_block 41;
get the phy_dev_size=20000000H tmp_off_size=100000H phy_dev_block=21Hnftl start:size_in_blk=41,free_block_num=8-blks(41), total_blocks(33)
(nfcode), size:9e000000
nftl version 1.01.002
Nov 18 2016, fix logic partition calculation
get the phy_dev_size=8b000000H tmp_off_size=458000H phy_dev_block=8cHnftl start:size_in_blk=158,free_block_num=18-blks(158), total_blocks(140)
amlnf_logic_init() done
MMC:   aml_priv->desc_buf = 0x0000000073f04370
aml_priv->desc_buf = 0x0000000073f06690
SDIO Port B: 0, SDIO Port C: 1
uboot env amlnf_env_read : ####
In:    serial
Out:   serial
Err:   serial
reboot_mode=watchdog_reboot
[store]To run cmd[amlnf dtb_read 0x1000000 0x40000]
cmd dtb_read:
amlnf_dtb_read: ####
262144 bytes dtd_read : OK
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxl platform: p212 variant: 2g
        dtb 0 soc: gxl   plat: p212   vari: 1g
        dtb 1 soc: gxl   plat: p212   vari: 2g
      Find match dtb: 1
vpu: clk_level in dts: 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpu: vpu_clk_gate_init_off
vpp: vpp_init
hpd_state=1
[1080p60hz] is invalid for cvbs.
set hdmitx VIC = 16
config HPLL = 2970000
HPLL: 0xc000027b
config HPLL done
j = 4  vid_clk_div = 1
hdmitx: set enc for VIC: 16
HDMITX-DWC addr=0x10004006 rd_data=0x40
Error: HDMITX-DWC exp_data=0xff mask=0x9f
rx version is 1.4 or below  div=10
hdmtix: set audio
hdmitx phy setting done
card in
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 3
OEM: 5054
Name: SL16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
mmc clock: 40000000
Bus Width: 4-bit
Net:   dwmac.c9410000amlkey_init() enter!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0

Start read misc partition datas!
info->attemp_times = 0
info->active_slot = 0
info->slot_info[0].bootable = 1
info->slot_info[0].online = 1
info->slot_info[1].bootable = 0
info->slot_info[1].online = 0
info->attemp_times = 0
attemp_times = 0
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[CANVAS]addr=0x7f851000 width=3840, height=2160
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 8
[BL31]: tee size: 0
[KM]Error:f[key_manage_query_size]L507:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L507:key[deviceid] not programed yet
detect sadckey ....
saradc - saradc sub-system

Usage:
saradc saradc open <channel>    - open a SARADC channel
saradc close    - close the SARADC
saradc getval   - get the value in current channel
saradc test     - test the SARADC by channel-7
saradc get_in_range <min> <max> - return 0 if current value in the range of current channel

gpio: pin GPIOAO_2 (gpio 102) value is 1
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
Booting...
Unknown command 'unifykey' - try 'help'
Unknown command 'unifykey' - try 'help'
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =7418fe10
copy done
Kernel command line: buildvariant=user
load dtb from 0x1000000 ......
      Amlogic multi-dtb tool
      Single dtb detected
   Uncompressing Kernel Image ... OK
   kernel loaded at 0x01080000, end = 0x021dd2f0
   Loading Ramdisk to 73d09000, end 73e9df4c ... OK
   Loading Device Tree to 000000001fff2000, end 000000001ffffdd0 ... OK
fdt_instaboot: no instaboot image

Starting kernel ...

uboot time: 3216835 us
[    0.000000@0] Initializing cgroup subsys cpu
[    0.000000@0] Initializing cgroup subsys cpuacct
[    0.000000@0] Linux version 3.14.29 (lb@linux-PowerEdge-R730) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP PREEMPT Thu Oct 25 16:01:55 CST 2018
[    0.000000@0] CPU: AArch64 Processor [410fd034] revision 4
[    0.000000@0] no prop version_code
[    0.000000@0] bootconsole [earlycon0] enabled
[    0.000000@0] fdt Reserved memory table:
[    0.000000@0]                  linux,di: 0x000000007c200000 - 0x000000007e000000  (30 MiB)
[    0.000000@0] DI: DI reserved memory: created CMA memory pool at 0x000000007c200000, size 30 MiB
[    0.000000@0]       linux,chunk-reserve: 0x0000000078200000 - 0x000000007c200000  (64 MiB)
[    0.000000@0]             linux,ion-dev: 0x0000000075200000 - 0x0000000078200000  (48 MiB)
[    0.000000@0]           linux,vdin1_cma: 0x0000000074000000 - 0x0000000075000000  (16 MiB)
[    0.000000@0] cma: Reserved 16 MiB at 74000000, total cma pages:4096
[    0.000000@0]               linux,ppmgr: 0x0000000075200000 - 0x0000000075200000  (0 MiB)
[    0.000000@0]        linux,codec_mm_cma: 0x000000005ec00000 - 0x0000000073c00000  (336 MiB)
[    0.000000@0] cma: Reserved 336 MiB at 5ec00000, total cma pages:90112
[    0.000000@0]              linux,picdec: 0x0000000075200000 - 0x0000000075200000  (0 MiB)
[    0.000000@0] Reserved memory: incorrect alignment of CMA region
[    0.000000@0]   linux,codec_mm_reserved: 0x000000005ab00000 - 0x000000005ec00000  (65 MiB)
[    0.000000@0] fdt Reserved memory total:  595 MiB
[    0.000000@0] cma: Reserved 8 MiB at 5a000000, total cma pages:92160
[    0.000000@0] psci: Using PSCI v0.1 Function IDs from DT
[    0.000000@0] PERCPU: Embedded 12 pages/cpu @ffffffc07519d000 s19968 r8192 d20992 u49152
[    0.000000@0] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 507763
[    0.000000@0] Kernel command line: rootfstype=ramfs init=/init console=ttyS0,115200 no_console_suspend earlyprintk=aml-uart,0xc81004c0 ramoops.pstore_en=1 ramoops.record_size=0x8000 ramoops.console_size=0x4000 androidboot.selinux=permissive logo=osd1,loaded,0x3d800000,1080p60hz maxcpus=4 vout=1080p60hz,enable hdmimode=1080p60hz cvbsmode=576cvbs hdmitx= cvbsdrv=0 androidboot.firstboot=0 jtag=apao androidboot.hardware=amlogic mac=C4:2A:FE:19:31:59 androidboot.mac=C4:2A:FE:19:31:59 androidboot.slot_suffix=_a buildvariant=user
[    0.000000@0] logo: osd1
[    0.000000@0] logo: loaded
[    0.000000@0] logo: 0x3d800000
[    0.000000@0] logo: 1080p60hz
[    0.000000@0] vout_serve: 1080p60hz
[    0.000000@0] vout_serve: enable: 1
[    0.000000@0] logo: get hdmimode: 1080p60hz
[    0.000000@0] logo: get cvbsmode: 576cvbs
[    0.000000@0] tv_vout: cvbs performance line = 0
[    0.000000@0] jtag: jtag select 2
[    0.000000@0] PID hash table entries: 4096 (order: 3, 32768 bytes)
[    0.000000@0] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
[    0.000000@0] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
[    0.000000@0] Memory: 1423204K/2059264K available (11014K kernel code, 1252K rwdata, 4164K rodata, 1343K init, 3796K bss, 636060K reserved)
[    0.000000@0] Virtual kernel memory layout:
[    0.000000@0]     vmalloc : 0xffffff8000000000 - 0xffffff807fff0000   (  2047 MB)
[    0.000000@0]     vmemmap : 0xffffff8080000000 - 0xffffff8081b90000   (    27 MB)
[    0.000000@0]     modules : 0xffffffbffc000000 - 0xffffffc000000000   (    64 MB)
[    0.000000@0]     memory  : 0xffffffc000000000 - 0xffffffc07e000000   (  2016 MB)
[    0.000000@0]       .init : 0xffffffc001f54000 - 0xffffffc0020a3e00   (  1344 kB)
[    0.000000@0]       .text : 0xffffffc001080000 - 0xffffffc001f53874   ( 15183 kB)
[    0.000000@0]       .data : 0xffffffc0020a4000 - 0xffffffc0021dd2f0   (  1253 kB)
[    0.000000@0] PM: Registered nosave memory: [mem 0x01080000-0x01f52fff]
[    0.000000@0] SLUB: HWalign=64, Order=0-1, MinObjects=0, CPUs=4, Nodes=1
[    0.000000@0] arch_multi_cluster:0
[    0.000000@0] Preemptible hierarchical RCU implementation.
[    0.000000@0]        RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
[    0.000000@0] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000@0] NR_IRQS:64 nr_irqs:64 0
[    0.000000@0] Architected cp15 timer(s) running at 24.00MHz (phys).
[    0.000005@0] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 2863311519744ns
[    0.008246@0] meson_bc_timer: mclk->mux_reg =ffffff800000c990,mclk->reg =ffffff800000e994
[    0.016862@0] Console: colour dummy device 80x25
[    0.021097@0] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=240000)
[    0.031672@0] pid_max: default: 32768 minimum: 301
[    0.036566@0] Security Framework initialized
[    0.040787@0] SELinux:  Initializing.
[    0.044550@0] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
[    0.051367@0] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes)
[    0.065225@0] Initializing cgroup subsys debug
[    0.065269@0] Initializing cgroup subsys freezer
[    0.068790@0] ftrace: allocating 37933 entries in 149 pages
[    0.119131@0] /cpus/cpu@0: Missing clock-frequency property
[    0.119177@0] /cpus/cpu@1: Missing clock-frequency property
[    0.124757@0] /cpus/cpu@2: Missing clock-frequency property
[    0.130387@0] /cpus/cpu@3: Missing clock-frequency property
[    0.135959@0] hw perfevents: enabled with arm/armv8-pmuv3 PMU driver, 7 counters available
[    0.186355@0] Meson chip version = RevD (21:D - C4:0)
[    0.204692@1] CPU1: Booted secondary processor
[    0.224647@2] CPU2: Booted secondary processor
[    0.244666@3] CPU3: Booted secondary processor
[    0.244746@0] Brought up 4 CPUs
[    0.255719@0] SMP: Total of 4 processors activated.
[    0.269834@0] sched: registering cpufreq notifiers for scale-invariant loads
[    0.271364@0] instabooting: 0
[    0.287102@0] cma: cma_init_reserved_areas, use_cma_first:1
[    0.287218@0] pinctrl core: initialized pinctrl subsystem
[    0.293278@0] regulator-dummy: no parameters
[    0.297849@0] NET: Registered protocol family 16
[    0.303942@0] ramoops: using module parameters
[    0.306588@0] console [pstore-1] enabled
[    0.309899@0] pstore: Registered ramoops as persistent store backend
[    0.316258@0] ramoops: attached 0x100000@0x7300000, ecc: 0/0
[    0.323036@0] cpuidle: using governor menu
[    0.326340@0] aml_vdac_init: module init
[    0.330172@0] register canvas platform driver
[    0.334507@0] register rdma platform driver
[    0.340740@0] vdso: 2 pages (1 code, 1 data) at base ffffffc0020ac000
[    0.345121@0] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.352406@0] DMA: preallocated 256 KiB pool for atomic allocations
[    0.360119@0] software IO TLB [mem 0x57000000-0x57400000] (4MB) mapped at [ffffffc057000000-ffffffc0573fffff]
[    0.368322@0] Serial: AMBA PL011 UART driver
[    0.373373@0] aml_i2c version: 20140813
[    0.376735@0] i2c-core: driver [pmu4] using legacy resume method
[    0.382711@0] codec_mm:codec_mm_module_init
[    0.386789@0] media_configs_system_init
[    0.390755@0] aml_watch_point_probe, in
[    0.394839@0] meson_mpll_clk: register mpll_clk_out0 success done
[    0.400528@0] meson_mpll_clk: register mpll_clk_out1 success done
[    0.406665@0] meson_mpll_clk: register mpll_clk_out2 success done
[    0.412993@0] clk_sys: register PLL sys_pll success done
[    0.418126@0] gxl_clk: [ xtal        ] ->clockrate: 24000000Hz
[    0.423445@0] gxl_clk: [ 32Khz       ] ->clockrate: 32000Hz
[    0.428615@0] gxl_clk: [ clk81       ] ->clockrate: 166666666Hz
[    0.434120@0] gxl_clk: [ fixed_pll   ] ->clockrate: 2000000000Hz
[    0.440076@0] gxl_clk: [ fclk_div2   ] ->clockrate: 1000000000Hz
[    0.446020@0] gxl_clk: [ fclk_div3   ] ->clockrate: 666666666Hz
[    0.451888@0] gxl_clk: [ fclk_div4   ] ->clockrate: 500000000Hz
[    0.457744@0] gxl_clk: [ fclk_div5   ] ->clockrate: 400000000Hz
[    0.463612@0] gxl_clk: [ fclk_div7   ] ->clockrate: 285714285Hz
[    0.469497@0] gxl_clk: clock initialization complete
[    0.474653@0] clkmsr: Gxl msr_clk_reg0=ffffff800003a75c,msr_clk_reg2=ffffff800003c764
[    0.485381@0] aml_iomap: amlogic iomap probe done
[    0.487986@0] pinmux-gxl c1109880.pinmux: Init pinux probe!
[    0.494092@0] pinmux-gxl c1109880.pinmux: Probed amlogic pinctrl driver
[    0.499903@0] genirq: Setting trigger mode 8 for irq 241 failed (gic_set_type+0x0/0xbc)
[    0.507372@0] genirq: Setting trigger mode 8 for irq 242 failed (gic_set_type+0x0/0xbc)
[    0.515659@0] genirq: Setting trigger mode 8 for irq 241 failed (gic_set_type+0x0/0xbc)
[    0.523469@0] genirq: Setting trigger mode 8 for irq 242 failed (gic_set_type+0x0/0xbc)
domain-0 init dvfs: 4
[    0.542067@0] codec_mm has 2 memory regions
[    0.542149@0] codec_mm codec_mm.19: assigned reserved memory node linux,codec_mm_cma ok
[    0.548751@0] codec_mm codec_mm.19: assigned reserved memory node linux,codec_mm_reserved ok
[    0.557421@0] codec_mm has 2 memory regions
[    0.561449@0] codec_mm codec_mm.19: assigned reserved memory node linux,codec_mm_cma ok
[    0.569499@0] codec_mm codec_mm.19: assigned reserved memory node linux,codec_mm_reserved ok
[    0.580550@0] vpu: driver version: v04
[    0.581749@0] vpu: load vpu_clk: 666667000Hz(7)
[    0.586431@0] vpu: vpu_probe OK
[    0.591636@0] tv_vout: tvout_probe
[    0.592843@0] tv_vout: chrdev devno 266338304 for disp
[    0.597998@0] vout_notify: vout_register_server
[    0.602570@0] tv_vout: register tv module server ok
[    0.607748@0] tv_vout: create cdev tv
[    0.611126@0] tv_vout: tvout_probe OK
[    0.615566@0] canvas_probe reg=00000000c8838000,size=400
[    0.620167@0] canvas maped reg_base =ffffff800008e000
[    0.629817@0] rdma_probe

T95S1 S905W, T9 RK3328, T95Z
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Posts: 2
Joined: Sun Mar 24, 2019 3:25 pm
Answers: 0

#60

i have a T95S2 P282 and i need a atvexperience img
please help me i am using usb burning tools
my box is T95S2 P282 2gb ram and 16 go
thanks for all


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