H96 pro Plus: from 3 giga Ram to 1 giga RAM !!
this is my log. in ranch bank only one pass others fail:
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61370
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61355
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61398
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61358
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61367
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61355
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61429
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61350
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61338
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61343
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
G
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61370
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61355
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61398
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61358
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61367
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61355
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61429
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61350
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61338
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 61343
BL2 Built : 11:58:42, May 27 2017.
gxl gc3c9a84 - xiaobo.gu@droid05
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 912MHz - FAIL
DDR3 chl: Rank0 @ 912MHz - FAIL
DDR3 chl: Rank0 16bit @ 912MHz - FAIL
DDR4 chl: Rank0+1 @ 1008MHz - FAIL
DDR4 chl: Rank0 @ 1008MHz - FAIL
DDR4 chl: Rank0 16bit @ 1008MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x00018400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x00065600
G
with your firmware ver. 2FF:
************************************************************************
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66749
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHz - FAIL
DDR4 chl: Rank0 @ 792MHz - FAIL
DDR4 chl: Rank0 16bit @ 792MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00066400
************************************************************************
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66749
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHz - FAIL
DDR4 chl: Rank0 @ 792MHz - FAIL
DDR4 chl: Rank0 16bit @ 792MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00066400
-
- Administrator & Developer
- Posts: 1551
- Joined: Tue Oct 02, 2018 6:19 pm
- Has thanked: 211 times
- Been thanked: 334 times
1. Download this uboot archive and unpack it.
2. Burn the u-boot.bin.sd.bin to the SD card with BootcardMaker.
3. Insert the prepared SD card into the card reader of your box.
4. Hold down eMMC pins 29-30 and start the logging operation with Putty. After about 2 sec. release both pins.
5. Post the log.
Make sure you really short the right pins. Here is the picture.
2. Burn the u-boot.bin.sd.bin to the SD card with BootcardMaker.
3. Insert the prepared SD card into the card reader of your box.
4. Hold down eMMC pins 29-30 and start the logging operation with Putty. After about 2 sec. release both pins.
5. Post the log.
Make sure you really short the right pins. Here is the picture.
Code: Select all
this is log:
**************************************************************************
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66840
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHzPR▒H▒I▒ chl: Rank0GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66887
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHz▒A LGXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66839
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_RQ9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHzGXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66834
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_R▒Q9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHz - FA L
DDR4 chl: RaGXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 66804
BL2 Built : 20:32:17, Sep 8 2017.
gxl g6296b83 - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - FAIL
DDR3 chl: Rank0 @ 792MHz - FAIL
DDR3 chl: Rank0 16bit @ 792MHz - FAIL
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR4 chl: Rank0+1 @ 792MHz - FAIL
DDR4 chl: Rank0 @ 792MHz - FAIL
DDR4 chl: Rank0 16bit @ 792MHz - PASS
Rank0: 1024MB(auto)-2T-18
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00066400
GXM: